RFRST=0, BSW=0, RIE=0, SSIRST=0, TIE=0, AUCKE=0, TFRST=0
FIFO Control Register
| RFRST | Receive FIFO Data Register Reset 0 (0): Clears a receive data FIFO reset condition 1 (1): Sets a receive data FIFO reset condition |
| TFRST | Transmit FIFO Data Register Reset 0 (0): Clears a transmit data FIFO reset condition 1 (1): Sets a transmit data FIFO reset condition |
| RIE | Receive Data Full Interrupt Output Enable 0 (0): Disables receive data full interrupts 1 (1): Enables receive data full interrupts |
| TIE | Transmit Data Empty Interrupt Output Enable 0 (0): Disables transmit data empty interrupts 1 (1): Enables transmit data empty interrupts |
| BSW | Byte Swap Enable 0 (0): Disables byte swap 1 (1): Enables byte swap |
| SSIRST | Software Reset 0 (0): Clears a software reset condition 1 (1): Sets a software reset condition |
| AUCKE | AUDIO_MCK Enable in Mastermode Communication 0 (0): Disables supply of AUDIO_MCK 1 (1): Enables supply of AUDIO_MCK |